Phase Locked Loop (PLL) frequency synthesizers are well known in the art. One of the more recognizable components of a conventional PLL frequency synthesizer is the voltage controlled oscillator (VCO). The primary function of the VCO is to provide a frequency response output as a function of voltage input signal amplitude.
One application to which a VCO controlled frequency synthesizer can be placed is that of a frequency multiplier. In such an application, the VCO output of the PLL frequency synthesizer is connected to a multiplier circuit that generates a product representation of the VCO output. The advantages typically associated with such a multiplier is the ability to multiply the output of the VCO such that a plurality of harmonic components of a single output can be generated simultaneously. By way of example, such an operation may be used to generate a VCO signal that is not in band with a transmitted or received signal.
Despite the advantages associated therewith, one of the remaining challenges associated with this type multiplier is the ability to maximize both the harmonic content and sub-harmonic rejection during a wide band operation when a narrow band resonant tank is employed for frequency selection. Traditional methods must either accept inferior performance; namely reduced noise isolation and decreased harmonic rejection, or incur the additional expense associated with complex cascade filter stage designs which are typically labor intensive, expensive, and susceptible to environmentally induced variations such as temperature, humidity, altitude, etc.
It would be extremely advantageous therefore to provide a frequency multiplier circuit for use with a PLL or other frequency synthesizer application, which exhibits high harmonic to fundamental rejection and exceptional noise isolation all in a simple design which is cost efficient, robust, and capable of operating across a wide bandwidth of operation, such as, for example, 800-900 Megahertz (MHz).